1. Field of the Invention
The present invention relates to an image processing apparatus and method for correcting a variation of an image signal and performing the coding of the image signal, and a computer readable storage medium storing a program for implementing the method.
2. Description of the Related Art
In a conventional method for coding image data using a stable synchronizing signal, an input image signal is input into a time base corrector so as to correct variations in the signal, and then image data in which such a variation has been corrected is coded in an image coding apparatus. The above variations include (i) dispersion of the transmission speed of the input image signal, (ii) disturbances of the synchronizing signal due to switching of scenes in the input image signal.
FIG. 4 is a block diagram showing the structure of a conventional time base corrector and image coding apparatus.
In FIG. 4, an analog image signal B1 such as an image signal obtained using a video camera, a recorded signal (to be reproduced) of a VTR, or a TV broadcast signal is input into a video decoder A1, where the analog signal is A/D converted and a digital image signal (called “image data” hereinbelow) B2 is obtained. In addition, an image-input clock and synchronizing signal B3 in synchronism with the image data B2 is also output from the video decoder A1. Therefore, these image data B2 and image-input clock and synchronizing signal B3 include a variation of the analog image signal B1.
Next, these image data B2 and image-input clock and synchronizing signal B3, including such a variation, are input into a time base corrector A8. In the time base corrector A8, the image writing section A10 writes image data B2 via image memory interface A11 into image memory A9 as image data B7. In this process, an image reading and writing control section A12 controls the data writing operation based on the clock signal (including a variation) output from the image writing section A10.
The image memory A9 has, for example, a storage capacity of 2 frames, and when a frame of image data B7 is written, the image reading section A13 performs the data reading operation and the next frame of image data is written. As the writing operation is accompanied by the reading operation, image data B8 is obtained. This image data B8 is read via image memory interface A11 by an image reading section A13. In this process, the image reading and writing control section A12 controls the data reading operation based on a stabilized clock signal output from a clock generator A19. Therefore, stable image data B9 in which variations of the input image signal are corrected, and a stable image-input clock and synchronous signal B10 are output from the time base corrector A8. The output signals are then input into an image coding apparatus A14.
In the image coding apparatus A14, an image writing section A16 writes the above image data B9 via an image memory interface A17 into an image memory A15 as image data B12. This writing operation is performed using the above clock signal B11. A coding section A18 then reads image data B13 via image memory interface A17 from the image memory A15 by using the clock signal B11, and codes the read data. Here, the reading operation from image memory A15 is executed for each coding unit, for example, for each Macro Block including 16×16 pixels, and the coding section A18 executes the coding operation in Macro-Block units. Accordingly, coded and compressed image data B6 can be obtained.
FIG. 5 is a block diagram showing the detailed structure of an example of the image writing and reading control section A12 in the time base corrector A8. In the figure, the image writing and reading control section A12 includes a writing line number threshold register A121, a reading line number threshold register A122, and a comparator A123.
FIG. 6A is a flowchart of the operation of writing data into image memory A9, while FIG. 6B is a flowchart of the operation of reading data from image memory A9. Both operations are performed by the image writing and reading control section A12.
For writing and reading control of the image memory A9, it is necessary to (i) prevent the writing operation from going ahead of the reading operation and thus deleting necessary data, and (ii) prevent the reading operation from going ahead of the writing operation and thus again reading out a previous frame during the reading of the current frame.
With reference to FIGS. 5 and 6A, it is assumed that the writing of a frame of image data is executed, as shown in step S11. Simultaneously, the reading of image data is performed (see step S21). When the writing of the frame is completed (see step S12), the comparator A123 compares the reading line number L1 received from the image reading section A13 with the threshold L2 received from the reading line number threshold register A122 (see step S13). The reading line number L1 indicates the number of lines in the current frame which have already been read. If L1>L2, the operation is returned to step S11 and the writing operation is continued, while if L1≦L2, it is determined that the writing operation may go ahead of the reading operation, and in step S14, a frame is skipped in the writing operation.
Next, with reference to FIGS. 5 and 6B, it is assumed that the reading of a frame of image data is executed, as shown in step S21. Simultaneously, the writing of image data is performed (see step S11). When the reading of the frame is completed (see step S22), the comparator A123 compares the writing line number L3 received from the image writing section A10 with the threshold L4 received from the writing line number threshold register A121 (see step S23). The writing line number L4 indicates the number of lines in the current frame which have already been written. If L3>L4, the operation is returned to step S21 and the reading operation is continued, while if L3≦L4, it is determined that the reading operation may go ahead of the writing operation, and in step S24, the current frame is again read in the reading operation.
Japanese Unexamined Patent Application, First Publication, No. Hei 8-223567, discloses an example of the above-explained conventional technique. In the coding apparatus disclosed in this document, a frame synchronizer is connected to a high-efficiency coding section, and each of the frame synchronizer and the high-efficiency coding has an image memory.
As explained above, in the conventional technique, a variation of image data is corrected using a time base corrector, and then the data is coded in an image coding apparatus. Therefore, a set of an image memory, an image writing section, and an image memory interface is necessary for each of the time base corrector and the image coding apparatus. Accordingly, the memory must have a large capacity, and the circuit arrangement must be complicated.
In addition, to provide two image memories causes an increase of the execution number of the data writing and reading operation, thereby increasing the processing time from the image input to the start of the coding.